Job description:

• Performs and supervises detailed Simulation, verification and validation of integrated circuits.
• Develop testbenches using System Verilog and UVM for functional and power aware RTL
• Develop UVM component like agents (active and passive), scoreboards and environment etc., Develop assertions, functional coverage.
• Develop test plan, UVM based test sequences, layered sequences, virtual sequencers
• Drive closure of verification metrics to cover verification space. Work with the team to identify and close gaps in functional, power aware and Gate level timing simulation.
• Provide regression setup, debug of RTL and gate level netlist.
• Review industry standard spec and augment test plan to improve quality of verification
• Participate in post silicon bring up, validation and compliance testing and debug
• Work collaboratively with cross-functional teams like product Architect, Designers, Project leads, Project managers
• Subject matter expert level communication with customer (and/or marketing), including presentation in design reviews, representing the verification team on weekly conference calls, defining/tracking/working to ensure schedule adherence, interactive problem solving, and customer communication under pressure, etc.

Profile description:

• Proven expertise with UVM and/or System Verilog based verification
• Excellent understanding of ASIC verification methodologies and proven experience of verification
• Experience working with source control tools, bug management tools and release management tools such as Jenkins, Git, and Jira.
• Strong written and verbal communication skills and ability to work independently.
• Bachelor’s in electrical engineering or equivalent and 12+ years of experience

suki.kee@ams-osram.com

+65 () 62402395